AISC Design Engineer



Raytheon - Integrated Defense Systems
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Post Date: Dec 24, 2021
Location: Arizona - Tucson
Security Clearance: Top Secret
Job Type: Permanent
Start Date: - n/a -
Salary: - n/a -
Job Reference: 188156BR
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Description
About us:

At Raytheon Missiles & Defense, you have the opportunity to try new things and make a bigger difference across a broader end-to-end solution, a richer technology and product set, an expanded range of disciplines, a growing global footprint and a more diverse team of colleagues and customers.

Job Summary:

Within the Digital Products Department (DPD), you will be a part of a key role within the Engineering organization by developing the electronics for the weapon system products. We engage at the outset of the weapon system development and follow our designs through deployment. Our team helps develop the requirements and bring concepts to life. Our products are deployed all over the world, on the ground, and they reach the exoatmospheric environments and into space. We are responsible for the architecture, design, verification and documentation of embedded processing at RMD.

In this role you will develop ASIC architectures capable of providing secure processing for multiple applications and platforms. Designs are implemented using Verilog and System Verilog for the following applications: gigabit serial interfaces, Radio Frequency (RF) and Electro-Optical (EO) DSP, controls, data links, embedded processing and processor interfaces. Designers work with circuit card designers and systems engineers to develop requirements, architect new parts, collaborative modeling of algorithms, partition and perform code development, simulation, and appropriate design for test techniques. Designs are verified against requirements using both directed test and constrained random methodologies. Design support is expected from requirements definition through integration and test. Design documentation and configuration management are required.

Responsibilities to Anticipate:
  • Help drive projects and execute to program schedules on time and budget
  • Ability to lead small teams and mentor junior engineers
  • Demonstrate self-motivation, with little supervision required
  • Design and deliver production quality ASIC releases from initial proof of concept up to production
  • Work cooperatively with systems, hardware, software engineers, and program management to ensure product success
  • Ability to architect complex system on a chip ASIC designs for systems, interfaces, and Concept of Operations (CONOPS)
  • Demonstrate experience and understanding of ASIC development EDA tools to include but may not be limited to Synopsys, Cadence, and Mentor Graphics tools.
  • Translate system level requirements into ASIC development and test requirements
  • Design and code in VHDL, Verilog, and System Verilog for reliability and maintainability
  • Verify designs utilizing self-checking techniques with directed and constrained random tests, while tracking functional and code coverage
  • Create complete documentation including requirements, verification plan, and user’s guides
  • Support internal and external technical reviews
An advanced degree in a related field may be substituted for two additional years of experience.

Qualifications You Must Have:
  • Bachelor of Science in Computer or Electrical Engineering
  • A minimum of 5 years of engineering experience
  • Experience with digital design and coding
  • Experience in ASIC development and tool flows
  • Experience with advancing designs from development through production and system integration
  • Hands on experience with integration and debug
  • The ability to obtain and maintain a US TS security clearance prior to the start date. U.S. citizenship is required as only U.S. citizens are eligible for a TS security clearance
Qualifications We Value:
  • ASIC design experience in one or more of the following areas:
    • Experience in SOC & CPU architectures and processing techniques
    • Experience in design for test and ASIC failure analysis techniques
    • Experience in embedded systems design using ARM, Intel, or RISC processors
    • Experience in gigabit serial interfaces and multi-gigabit transceivers (MGTs)
    • Experience in constrained random verification in UVM using System Verilog
    • Experience in verification utilizing emulation platforms, such as Veloce

What We Offer:

Whether you’re just starting out on your career journey or are an experienced professional, we offer a robust total rewards package that goes above and beyond with compensation; healthcare, wellness, retirement and work/life benefits; career development and recognition programs. Some of the superior benefits we offer include parental (including paternal) leave, flexible work schedules, achievement awards, educational assistance and child/adult backup care.
Clearance Information: This position requires the eligibility to obtain a security clearance. Non-US citizens may not be eligible to obtain a security clearance. The Defense Industrial Security Clearance Office (DISCO), an agency of the Department of Defense, handles and adjudicates the security clearance process. More information about Security Clearances can be found on the US Department of State government website here: https://www.state.gov/m/ds/clearances/c10978.htm

Location Information:
This position is located in beautiful Tucson, AZ. Tucson has a friendly, caring and laid-back atmosphere, combined with the innovation and energy of a metropolitan region and recognized as one of America’s 10 Best Small Cities. Surrounded by beautiful mountains, colorful Sonoran Desert landscape and majestic saguaro cacti, Tucson is blessed with some of nature’s best work. Tucson is known for its bright blue skies, and with more than 310 sunny days per year, Tucson’s fantastic weather lets residents enjoy the outdoors year-round.)





188156

Raytheon is an Equal Opportunity/Affirmative Action employer. All qualified applicants will receive consideration for employment without regard to race, age, color, religion, creed, sex, sexual orientation, gender identity, national origin, disability, or protected Veteran status.








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